SHA-1: A Secured Hash Algorithm

• Description

  This core is the fully compliant implementation of the NIST FIPS PUB 180-2 Secure Hash Algorithm - 1.
  
  It produces output of 160 bit message digest for the input messages of up to (264 - 1) bits. The input must be in multiple of 8 bits.

• Features of Implemented Core

  • Automatic message length calculation and padding
  • On chip Block RAM used
  • For last 512 block - requires 66 clock cycles
  • For other 512 block - requires 68 clock cycles
  • Core available in synthesizable VHDL

• Core Facts